Acronyms![]() |
Expansion | Context |
---|---|---|
VIPRAM | Vertical Integrated Pattern Recognition Associative Memory | |
TTS | ||
TTC | Time, Trigger and Control | |
TTA | Trigger Tower Architecture | |
TT | - Track Trigger - Trigger Tower |
|
TRG | ||
TPG | Tracker Performance Group | |
TOB | Tracker Outer Barrel | |
TMT | Time-multiplexing Technique | |
TMR | Triple Modular Redundancy | |
TK | Tracker | |
TID | Tracker Inner Detector | |
TIB | - Tracker Inner Barrel - Tracker Institution Board |
|
THR | Threashold | |
TH | Threashold | |
TF | Track Fit | |
TEC | Tracker End Cap | |
TDR | Technical Document Repository | |
TDCS | Trigger Distribution and Control System | |
SSD | Solid State Drive | |
SS | - Silicon Strip - Super Strip |
|
SPI | Serial Peripheral Interface | |
SD | Silicon Detectors | |
SCT | Silicon Tracker | |
SCR | - Silicon Carrier Region - Silicon Controlled Rectifier |
|
RTM | Rear Transition Module | |
ROI | Region of Interest | |
ROD | Read-out driver | |
RO | Read-out | |
RGH | Random Ghost Hits | |
PX | Pixel | |
PV | ||
PU | Pile-up | |
PT | Pattern Track | |
pt | angular momentum | |
PS | (Pixel + Strip) Sensor | |
PRP | Pattern Recognition Platform | |
PRM | Pattern Recognition Mezzanine | |
PRE | Pattern Recognition Engine | |
PRB | Pattern Recognition Board | |
PR | - Pattern Recognition - Pattern Reconstruction |
|
PPS | Precision Proton Spectrometer | |
POG | Physics Object Group | |
PMOS | P-type MOS | |
NH | ||
MPA | ||
MOS | Metal Oxide Semiconductor | |
ML | Majority Logic | |
MIC | ||
lpGBT | low power GBT | |
L1 | Level 1 | |
IPMI | Intelligent Platform Management Interface | |
IPMC | Intelligent Platform Management Controller | |
ID | Inner Detector | |
I2C | Inter Integrated Circuit (bus) | |
HPK | ||
HPC | - High Performance Computing - High Pin Counting |
|
HLT | High Level Trigger | |
HCAL | Hadronic Calorimeter | |
HAPS | Hybrid Active Pixel Sensor | |
GT | Global Trigger | |
GPU | Graphics Processing Unit | |
GPGPU | General Purpose GPU | |
GBT | Gigabit Transceiver | |
FTP | File Transfer Protocol | |
FTK | Fast Tracker | |
FRN | ||
FR | Fake Rate | |
FPIX | End Cap of Pixel Detector | |
FPGA | Field Programmable Gate Array | |
FMC | FPGA Mezzanine Card | |
FED | Front End Driver | |
FEB | same as DTC | |
FE | Front End | |
Et | Transverse Energy | |
Eff | Efficiency | |
ECAL | Electromagnetic Calorimeter | |
EC | Endcap | |
DTC | Data Trigger and Control board | |
DT | Drift Tube | |
DPG | Detector Performance Group | |
DIB | ||
DFS | Data Formatting System | |
DF | Data Formatter | |
DC | Don't Care (bits) | Associative Memory |
DAQ | Data AcQuisition | |
CUDA | Compute Unified Device Architecture | |
CSC | Cathode Strip Chambers | |
CPU | Central Processing Unit | |
CMOS | Complementary MOS | |
CIC | ||
CBC | ||
CAM | Content-Addressable-Memory | |
BX | Bunch Cross | |
BPIX | Barrel of Pixel Detector | |
BER | Bit Error Rate | |
BE | Back End | |
ATCA | Advanced Telecommunications Computing Architecture | |
ASIC | Application-Spcific Integrated Circuit | |
AM | Associative Memory | |
2S | Two Strip Sensor |